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111 |
[2004.11.__] Characteristics of Ru barrier layer in Mo/Ru/Si multilayer for EUV reflector applications
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110 |
[2004.11.24] Design of Extreme Proximity Gettering
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109 |
[2004.11.01] Influence of physical characteristics of ceria particles on polishing rate of chemical mechanical planarization for shallow trench isolation
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108 |
[2004.11.01] A reverse selectivity ceria slurry for the damascene gate chemical mechanical planarization process
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107 |
[2004.10.__] Extended defects and pile-up of interstitial oxygen in silicon wafer due to MeV-level nitrogen ion implantation
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106 |
[2004.10.__] Effect of Ge mole fraction and Strained Si Thickness on Electron Mobility of FD n-MOSFET Fabricated on Strained Si/Relaxed SiGe/SiO2/Si
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105 |
[2004.10.__] Determination of the distribution and morphology of silicon islands in the buried oxide layer of SOI wafers by using a focused ion beam and transmission electron microscope
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104 |
[2004.10.31] 나노 스케일 C-MOSFET에 적용되는 완충된 SiGe층 위에 성장된 나노스케일 변위 실리콘층을 가지는 SOI C-MOSFET
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103 |
[2004.10.28] Effect of Strained Si Thickness on Electron Scattering Rate in n-MOSFET Fabricated on Strained Si/SiGe/SiO2/Si
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102 |
[2004.10.28] Design and Implementation of the Mobile Disaster Management Application System Based on PDA
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101 |
[2004.10.28] CDS Reliability Test of Contents Aggregater for VOD/NVOD Service.
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100 |
[2004.09.__] Proximity gettering process for 300-mm silicon wafers
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99 |
[2004.09.__] Effect of nano-scale strained Si layer grown on SiGe-on-insulator structure on MOSFET drain current improvement
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98 |
[2004.08.__] Nature of Surface and Bulk Defects Induced by Epitaxial Layer Growth in Epitaxial Transfer Wafers
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97 |
[2004.08.16] A Study on the Optimization of the Layout for the ESD Protection Circuit in 0.18µm CMOS Silicide Process
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