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공지 Update 진행중
101 [2004.09.__] Proximity gettering process for 300-mm silicon wafers
100 [2004.09.__] Effect of nano-scale strained Si layer grown on SiGe-on-insulator structure on MOSFET drain current improvement
99 [2004.08.__] Nature of Surface and Bulk Defects Induced by Epitaxial Layer Growth in Epitaxial Transfer Wafers file
98 [2004.08.16] A Study on the Optimization of the Layout for the ESD Protection Circuit in 0.18µm CMOS Silicide Process
97 [2004.08.15] Effect of molecular weight of surfactant in nano ceria slurry on shallow trench isolation chemical mechanical polishing (CMP) file
96 [2004.08.10] Dependency of precipitation of interstitial oxygen on its crystal nature in Czochralski silicon wafer file
95 [2004.08.01] Nanotopography impact in shallow trench isolation chemical mechanical polishing-dependence on slurry characteristics
94 [2004.08.01] Achievement of nano-scale SiGe layer with discrete Ge mole fraction profile using batch-type HVCVD
93 [2004.07.09] Nanotopography Simulation of Shallow Trench Isolation Chemical Mechanical Polishing using Nano Ceria Slurry
92 [2004.06.__] Characteristic Study for Defect of Top Si and Buried Oxide Layer on the Bonded SOI Wafer file
91 [2004.06.25] EUVL Mask Defect Isolation and Repair using Focused Ion Beam (Focused Ion Beam을 이용한 EUVL Mask Defect Isolation 및 Repair)
90 [2004.06.01] Nanotopography Impact in Shallow-Trench Isolation Chemical Mechanical Polishing - Analysis Method and Consumable Dependence file
89 [2004.05.28] EUV Lithography Blank Mask Repair using a FIB file
88 [2004.04.15] Effects of abrasive size and surfactant in nano ceria slurry for shallow trench isolation file
87 [2004.03.__] 초고집적 반도체 STI 연마 공정용세리아 슬러리의 특성이 나노토포그래피에 미치는 영향